Kamakoti Veezhinathan

Latest

• Depending on HTTP/2 for Privacy? Good Luck!
• Brutus: Refuting the Security Claims of the Cache Timing Randomization Countermeasure Proposed in CEASER
• Karna: A gate-sizing based security aware eda flow for improved power side-channel attack protection
• Karna: A Security Aware EDA Flow for Improved Side-Channel Attack Protection
• White Mirror: Leaking Sensitive Information from Interactive Netflix Movies using Encrypted Traffic Analysis
• MLTimer: Leakage Power Minimisation in Digital Circuits using Machine Learning and Adaptive Lazy Timing Analysis
• GANDALF: A fine-grained hardware-software co-design for preventing memory attacks.
• FastReplace: Efficient Vt Replacement Technique for Leakage Power Minimization
• The Implications of Shared Data Synchronization Techniques on Multi-Core Energy Efficiency